Analog Amplifiers

Common-Emitter NPN Transistor Voltage Amplifier Simulator

Visualize small-signal voltage amplification and 180° phase inversion on a voltage-divider-biased 2N3904 NPN stage with emitter degeneration.

Speed
A small 50 mV AC input signal (CH1) coupled into a biased 2N3904 NPN stage produces an inverted, amplified AC output waveform (CH2)!
● CH1: CH1
● CH2: CH2

Engineering Theory & Mathematical Model

Av ≈ −Rc / Re = −4.7 kΩ / 470 Ω ≈ −10×

Resistors R1 (47 kΩ) and R2 (10 kΩ) establish a stable DC quiescent operating point (Q-point) at the Base (~2.1V), placing the Emitter at ~1.4V and setting collector bias current near 3 mA. Coupling capacitor CIN superposes the AC input signal onto the Base without disturbing DC bias, yielding an inverted collector swing with stable gain Av ≈ −Rc/Re.

Interactive Lab Procedure

  1. Compare CH1 (small AC input) and CH2 (amplified, inverted collector waveform) on the 2-channel oscilloscope.
  2. Increase VIN amplitude above 0.8V to observe symmetrical clipping distortion against saturation and cutoff rails!
  3. Switch oscilloscope mode to X-Y (Lissajous) to see the negative-slope transfer line of an inverting amplifier.

Technical FAQ

What is the core governing formula for Common-Emitter NPN Transistor Voltage Amplifier Simulator?

Av ≈ −Rc / Re = −4.7 kΩ / 470 Ω ≈ −10× — Resistors R1 (47 kΩ) and R2 (10 kΩ) establish a stable DC quiescent operating point (Q-point) at the Base (~2.1V), placing the Emitter at ~1.4V and setting collector bias current near 3 mA. Coupling capacitor CIN superposes the AC input signal onto the Base without disturbing DC bias, yielding an inverted collector swing with stable gain Av ≈ −Rc/Re.

Can I modify component values and rewire this circuit live?

Yes! The schematic above runs a live MNA SPICE engine. Click any part to adjust parameters, add or delete wires and components, and click Share URL to save your custom topology.

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