Engineering Theory & Mathematical Model
A Graetz 4-diode bridge steers both positive and negative half-cycles of an AC source through the load resistor in the same polarity. During positive half-cycles, diodes D1 and D4 conduct in series; during negative half-cycles, D2 and D3 conduct. Because two silicon junctions conduct simultaneously, peak output drops by approximately 2Vf (≈ 1.4 V). Closing the filter switch connects the 100 µF reservoir capacitor, dramatically reducing output ripple at twice the line frequency (2f = 120 Hz).
Interactive Lab Procedure
- Click the "Filter ON" switch on the top right to disconnect the 100 µF capacitor and watch CH2 turn into raw pulsating full-wave arches!
- Close the switch again to observe smooth DC filtering with classic sawtooth ripple.
- Select the 1 kΩ load resistor and reduce it to 220 Ω to see heavy load current increase ripple amplitude.
Technical FAQ
What is the core governing formula for Full-Wave 4-Diode Bridge Rectifier & Filter Capacitor Simulator?
Vdc_peak ≈ Vp − 2Vf, V_ripple ≈ I_load / (2 × f × C) — A Graetz 4-diode bridge steers both positive and negative half-cycles of an AC source through the load resistor in the same polarity. During positive half-cycles, diodes D1 and D4 conduct in series; during negative half-cycles, D2 and D3 conduct. Because two silicon junctions conduct simultaneously, peak output drops by approximately 2Vf (≈ 1.4 V). Closing the filter switch connects the 100 µF reservoir capacitor, dramatically reducing output ripple at twice the line frequency (2f = 120 Hz).
Can I modify component values and rewire this circuit live?
Yes! The schematic above runs a live MNA SPICE engine. Click any part to adjust parameters, add or delete wires and components, and click Share URL to save your custom topology.